A GENERAL VIEW - Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications - page 15

program locality . For example, it has been observed that with a 1 Mbyte memory and
a 8 Kbyte cache, the data requested from a program are found in the cache 80 percent
of the time ( hit ratio ).

The need for having a fast cache appeared when memory was much slower. Today,
however, since memory has an access time almost comparable to that of the cache,
the main motivation for having a cache is not only to speed up process execution but
also to reduce conflicts with other devices. In any case, the cache is considered as a
processor attribute that speeds up the activities of a computer.

In real-time systems, the cache introduces some degree of nondeterminism. In fact,
although statistically the requested data are found in the cache 80 percent of the time,
it is also true that in the other 20 percent of the cases the performance degrades. This
happens because, when data is not found in the cache (cache fault or miss), the access
time to memory is longer, due to the additional data transfer from RAM to cache.
Furthermore, when performing write operations in memory, the use of the cache is
even more expensive in terms of access time, because any modification made on the
cache must be copied to the memory in order to maintain data consistency. Statistical
observations show that 90 percent of the memory accesses are for read operations,
whereas only 10 percent are for writes. Statistical observations, however, can provide
only an estimation of the average behavior of an application, but cannot be used for
deriving worst-case bounds.

In preemptive systems, the cache behavior is also affected by the number of preemp-
tions. In fact, preemption destroys program locality and heavily increases the number
of cache misses due to the lines evicted by the preempting task. Moreover, the cache-
related preemption delay (CRPD) depends on the specific point at which preemption
takes place; therefore it is very difficult to precisely estimate [AG08, GA07]. Bui et al.
[BCSM08] showed that on a PowerPC MPC7410 with 2 MByte two-way associative
L2 cache the WCET increment due to cache interference can be as large as 33 percent
of the WCET measured in non-preemptive mode.

1.3.3 INTERRUPTS

Interrupts generated by I/O peripheral devices represent a big problem for the pre-
dictability of a real-time system because, if not properly handled, they can introduce
unbounded delays during process execution. In almost any operating system, the ar-
rival of an interrupt signal causes the execution of a service routine ( driver ), dedicated
to the management of its associated device. The advantage of this method is to encap-
sulate all hardware details of the device inside the driver, which acts as a server for the