Hardware Reference
In-Depth Information
FIGURE 29.1: The effect of the end of Dennard Scaling on microprocessor
performance, power consumption, and architecture.
result, the favorable power scaling Moore and Dennard observed has been lost,
clock rates have consequently plateaued, and single-processor computational
performance has therefore stagnated (also shown in Figure 29.1). With the
end of voltage scaling, power has become the dominant constraint for future
computing. The challenges posed by improving performance pervade all design
choices in building future processor and storage technology from 2004 forward,
which will be explored in more detail in Chapter 33.
Since single-processing core performance no longer improved with each
generation, performance could be improved, theoretically, by packing more
cores into each processor. This multicore approach continues to drive up the
theoretical peak performance of the processing chips, and we are on track to
have chips with thousands of cores by 2020 [1]. This increase in parallelism
via core count is clearly visible in the black trend line in Figure 29.2. This
is an important development in that programmers outside the small cadre of
those with experience in parallel computing must now contend with the chal-
lenge of making their codes run effectively in parallel. Parallelism has become
everyone's problem and this will require deep rethinking of the commercial
software and algorithm infrastructure. The changes portend a move toward
unprecedented levels of parallelism that fundamentally challenge POSIX data
