Hardware Reference
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29.1 Technology Scaling
29.1.1 Classical Scaling Period (1965{2004)
In 1965, Gordon Moore famously observed that the number of components
on an integrated circuit had been doubling every year since the introduction of
this technology in 1959. 1 Shrinking the dimensions on an integrated structure
also made it possible to operate the structure at higher speed for the same
power per unit area, so that computing functionality would improve exponen-
tially with time at roughly constant cost per generation. This latter observa-
tion is commonly referred to as Dennard Scaling because it was formalized
and extended in Robert H. Dennard of IBM. 2 From 1965 to approximately
2004, Dennard Scaling enabled exponential increases in the serial computing
performance over a period of three decades. This offered a compelling benefit
in that software could remain relatively stable and still execute substantially
faster with every new technology generation. As a result, most of the com-
mercial software infrastructure is designed for serial computation. Throughout
this period, parallel computing remained a fringe activity, conducted in the
national laboratories, universities, and a few leading companies.
These scaling trends are primarily associated with computing technology,
but also directly relate to improvements in storage technology as we move for-
ward. Disk storage densities are primarily limited by the superparamagnetic
limit, but with vertical recording methods, the size of the magnetic record-
ing head for a disk unit is closely related to Moore's law improvements in
fabricating these devices at smaller scale. As the industry moves away from
magnetic disk technologies, FLASH and other solid-state storage technolo-
gies also depend upon the same lithographic advances used to improve logic
density so that they can improve storage density. The improvements in litho-
graphic density underpin storage density and cost improvements for the past
two decades.
29.1.2 End of Classical Scaling (2004)
Although Moore's Law has continued to enable us to increase logic and
storage densities at historical rates (as shown in Figure 29.1), by 2004 it was
no longer feasible to scale voltage down with lithographic feature size due
to physical limits relating to the underlying materials' characteristics. As a
1 This is the source of what is commonly referred to asMoore'sLaw, which rst appeared
in Gordon E. Moore, \Cramming More Components onto Integrated Circuits,"Electronics
38 (8): 114{117, April 19, 1965.
2 This observation is commonly referred to as Dennard Scaling because it was formal-
ized and extended in Robert H. Dennard et al. \Design of Ion-Implanted MOSFET's with
Very Small Physical Dimensions,"IEEEJournalofSolid-StateCircuitsSC-9 (5): 256{268,
October 1974.
 
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