Hardware Reference
In-Depth Information
FIGURE 26.1: IPM's core framework collects performance events from IPM
modules and transports them via the parallel interconnect to provide an
application-level performance profile. Modules are topical and selectable at
runtime.
a computing facility [4] level. The basis for such monitoring derives from the
hardware performance monitoring (HPM) tools [7] that pre-date widespread
need for I/O monitoring. For the present purposes, the former cases are dis-
cussed more than the latter and specifically on the topic of I/O. IPM has a
modular structure and monitors compute cores and messaging trac topolo-
gies.
The modules of the framework in Figure 26.1 all share a lightweight hash-
ing scheme that maps a large space of potential application events, each keyed
by a 128-bit event signature, into a small memory footprint (2{4 MB) event
table. For each event ID, a minimal set of timings and counts are maintained
and reported when the application completes. The hashing scheme is designed
for fast inserts to minimally perturb the running application both in terms of
CPU and memory overhead, as shown in Figure 26.2. The overall design of
IPM is intended to introduce a small [2], predictable, and scale-free perturba-
tion on application performance.
Figure 26.3 shows the text output from IPM, which by default takes the
form of a high-level overview of application performance that includes aggre-
gate I/O performance.
The POSIX interface is, on modern architectures, a reasonable point to
reliably intercept and monitor I/O communication between the application
and disk. On the post-IBM AIX HPC architectures, even complex POSIX
