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guarantee that real-time constraints are met. On top of this, the run-time system
must be not too complex as this makes any formal system analysis infeasible and
thereby neglects the possibility to demonstrate the formal timing correctness of
the system, which is of greatest importance when it comes to the implementation
of safety-relevant features by means of electronics, e.g. an anti-blocking system of
a car. Overall, this makes the analysis and design of embedded (control) systems
extremely challenging, particularly when deploying less predictable multi-core
processors, originally designed for the consumer electronics market and not for
executing safety-relevant applications.
Contents
This tutorial is concerned with the analysis and run-time support for real-time
constrained software executing on multi-core processors with shared resources
like caches, memory and intra-core connects. In this setting the challenge is to
organize resource use in such a way, that the system is good to analyse, but
one avoids waste of compute-capacity or other resources. E.g. static resource
arbitration or allocation leads to deterministic system behavior, but may yield
low resource utilization which in turn limits the number of applications to be
concurrently executed. For addressing these topics the tutorial will present
Part 1: Real-Time Performance Analysis. A modelling and analysis
methodology for (formally) analysing real-time constrained software deployed
on multi-core architectures. This will contain an introduction to Timed Au-
tomata [1] and Real-time Calculus [7] and a in-depth presentation of research
results concerned with the modelling and analysis of real-time constraint em-
bedded systems, e.g., [4,5,2].
Part 2: Monitoring of Real-Time Workloads. This part will present run-
time mechanisms for ensuring timing correctness (a) in the presence of race
conditions and complex arbitration schemes to coordinate access to the
shared resource and (b) for carrying out online dynamic power management.
The presented material is based on the work presented in [3,6]
The co-development of run-time mechanisms and analysis methods is motivated
by the fact that the mechanisms which reduce the non-determinism of the system
and its performance model can be exploited within the analysis, as well as within
the running system.
The presented techniques support the design safety-critical embedded real-
time systems on non-customized multi-core chip designs, originally designed for
the consumer-electronic market, rather than for being deployed in a safety sys-
tem's context.
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