Digital Signal Processing Reference
In-Depth Information
automatically generate a VHDL source program, adjusting to its code
dimension and size. VHDL is a hardware description language, which
translates software programs into hardware configurations. Installation of
hardware circuitry through software language is especially suitable for the
circuitry that consists of repetition or regularity. By applying this program, it
is possible to generate the encoder and decoder for three to five dimensional
codes.
Figure 7-7 shows the decoding circuit. The data received are fed to the
memory cells of the torus-connected shift register. The connection order of
the shift register is the same as the order of the encoder output shift register.
The register contents are then transferred in parallel to the parity calculation
circuit as well as the majority logic circuit to decide the digit. The majority
logic circuit is a principal part of decoding, and whether or not the value
exceeds the given threshold, each digit is corrected by a majority decision of
the n independent parity checks. To improve the decoding characteristics, the
decision of the majority logic circuit is repeated several times by varying the
threshold value, and the digit value determined by the logic circuit is fed
back to the input side register. After completion of decoding, only the data
digit is transferred to the output shift register.
