Digital Signal Processing Reference
In-Depth Information
1.
INTRODUCTION
Recently, transmission speed of radio communications represented by
LAN and cellular phones has largely increased. Hence, there is an increasing
demand for robust and high-speed error correction code. As for the high-
speed and robust error correction code, the Reed-Solomon code is mentioned
first, but its correction capacity is inferior to the proposed code in an
environment with an error of
to
Moreover, the Turbo code does not
perform well in a practical environment.
In order to meet requirements, we have proposed a topological new code
“High dimensional torus knot code.” The proposed code is resistant to a
random error of to and to the burst errors. This code can be realized
as a high-speed circuit, which makes full use of parallel operation and wired
logic technology, because it consists of simple parity operations. We
successfully realized the hardware implementation of the proposed code on
an ASIC and FPGA with throughput of 6 to 48 Gbps, and we developed the
high-speed MPEG communication device by applying the proposed code.
The proposed code will be expected to work well in degraded channel
situations such as cellular phone [1].
2.
ARCHITECTURE OF HIGH DIMENSIONAL
DISCRETE TORUS KNOT CODE
Figure 7-1 represents a schematic diagram of the proposed code that
shows data flow from input to output. The proposed code consists of two
processing blocks, which are a high-dimension parity code and a torus knot
scramble.
Figure 7-1.
Schematic diagram of proposed code.
