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nels having ISI limited to a few symbol periods. Beyond that, we must turn to
less complex, but less ecient, solutions.
There are several ways to deal with this problem. If we limit ourselves to us-
ing equalizers derived from the MAP criterion, one idea is to reduce the number
of paths examined by the algorithm in the trellis. A first approach performs a
truncation of the channel impulse response in order to keep only the J<L first
coecients. The number of states in the trellis will then be decreased. The ISI
terms ignored in the definition of the states are then taken into account when
calculating the branch metrics, using past decisions obtained from the knowl-
edge of the survivor path in each state. This strategy is called Delayed Decision
Feedback Sequence Estimation (DDFSE). It offers good performance provided
most of the channel's energy be concentrated in its first coecients which, in
practice, requires the implementation of a minimum-phase pre-filtering oper-
ation. Applying this technique to turbo equalization has, for example, been
studied in [11.2]. A refinement of this algorithm involves grouping some states
of the trellis together, in accordance with the set-partitioning rules defined by
Ungerboeck [11.52] for designing trellis coded modulations. This improvement,
called Reduced State Sequence Estimation (RSSE), includes DDFSE as a par-
ticular case [11.19]. In a similar way, we can also envisage retaining more than
one survivor path in each state to improve the robustness of the equalizer and if
necessary to omit the use of pre-filtering [11.42]. Rather than reduce the number
of states of the trellis by truncation, it can also be envisaged to examine only
a non-exhaustive list of the most likely paths at each instant. The resulting
algorithm is called the " M algorithm", and its extension to SISO equalization
was studied in [11.17]. Whatever the case, the search for ecient equalizers with
reduced complexity regularly continues to give rise to new contributions.
All the strategies that we have mentioned above enter into the category of
MAP turbo equalizers with reduced complexity. Generally, these solutions are
interesting when the number of states of the modulation is not too high. On
the other hand, in the case of high data rate transmissions on channels with
long delay spreads, it is preferable to envisage filter-based turbo equalizers of
the MMSE type.
Architectures and applications
When systems based on MAP turbo equalization require real time processing
with relatively high data rates (of the order of several Mbits/s), a software im-
plementation cannot be envisaged. In this case, we must resort to specific ASIC
circuits. The circuit implementation of a MAP turbo equalizer poses problems
similar to those encountered in the context of the hardware implementation of
a turbo decoder. Two architectural solutions can be envisaged:
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