Cryptography Reference
In-Depth Information
flip-flops. When size increases, for reasons of hardware space and consumption,
it becomes fairly quickly worthwhile using a RAM memory and two pointers
(one for writing and one for reading), incremented at each new datum, with the
addressing managed circularly. We can also make a remark about the multipli-
cation of the extrinsic values by
α
. In a conventional implementation, values
W
k
are generally integers of reduced size (5 or 6 bits) but the hardware cost
of a real multiplier is prohibitive, and we generally prefer to substitute it by a
simple table.
Figure 8.8 - Internal architecture of the half-iteration processor.
The SISO decoder, described by Figure 8.9, performs the steps of the Chase-
Pyndiah algorithm. The decoder is made up of five parts:
-
The module for sequential processing of the data
calculates in parallel the
input codeword syndrome and the least reliable positions in the frame.
-
The algebraic decoding module
performs the algebraic decoding of the
words built from input
R
k
data and knowledge of the least reliable places.
-
The selection module
determines the most probable codeword as well as
the closest concurrent word or words.
-
The module for calculating the weightings
determines the reliability of the
decoded bits.
-
The memory module
stores the total input weightings that are used to
calculate the weightings.
The module for processing the data receives the sample bits, one after the
other. If the code is cyclic (BCH, for example) calculating the syndrome is
then very simply done by using the factorization of the generator polynomial
following the Hörner scheme. Determining the least reliable positions is often
done by sequentially managing the list of not so reliable positions in a small
local RAM. There are also other solutions that are more economical in size, like
Leiserson's systolic array, but the gain obtained is small.
