Graphics Reference
In-Depth Information
Ref.
L3 SRAM
ME Ref.
Prefetch
MUX
MUX
Ref. L1 / L2
SRAM
(Subsampled
Pattern)
Ref. L1 / L2
SRAM
(Subsampled
Pattern)
Ref. L1 / L2
SRAMx1
Ref. L1 / L2
SRAMx1
Ref. L1 / L2
SRAMx1
MUX
MUX
FME Ref.
Broadcast
FME1
Ref. L1
SRAMx11
IME
FME2
Ref. L1
SRAMx11
FME3
Fig. 11.13
Detail data flow for reference memory subsystem
Data scheduling for each stage is explained in the following. Before start,
reference frame data within the maximum supported search range are loaded into
L3 SRAM through system bus. In stage 1, the ME prefetching unit reads the actually
used data from the L3 SRAM and writes them to the L2 SRAMs. There are two
kinds of L2 SRAMs with different data ordering. The ME prefetching unit prepares
the data in both kinds of order and writes them to the corresponding L2 SRAMs.
After that, the connections to the L2 SRAM and the L1 SRAM are exchanged by
altering the multiplexer configuration. The L2 SRAM in stage 1 will act as the L1
SRAM and be connected to the IME engine in stage 2. Thus, the written data in
stage 1 can be accessed by the IME engine in stage 2. In stage 2, the IME engine
reads out the data in the L1 SRAM with subsampled pattern. The FME reference
broadcasting unit reads from the first L1 SRAM in fully sampled pattern and
broadcasts the data to the other 11 L1 SRAMs. In stage 3, all the 12 L1 SRAMs are
filled with reference frame data and are able to support three sets of FME engines
with full sampled access.
11.4
Intra Prediction
Intra prediction reduces spatial redundancy in video by predicting from neighboring
pixels around the current PU. The neighboring pixels used for prediction are the
previously reconstructed pixels. Compared to H.264/AVC, there are primarily two
differences: (1) Increased prediction modes and (2) Hybrid intra/inter prediction
modes inside the same CTU. For the first one, there are a total of 35 possible intra
