Graphics Reference
In-Depth Information
Tabl e 8. 18
Distribution of regular coded, bypass and termination bins
for CABAC in H.264/AVC (JM-16.2) and HEVC (HM8.0) under
common test conditions [
6
,
101
]
Common condition
Context
Bypass
Term
configurations
(%)
(%)
(%)
H.264/AVC
Hierarchical B
80.5
13.6
5.9
Hierarchical P
79.4
12.2
8.4
HEVC
Intra
67.9
32.0
0.1
Low Delay P
78.2
20.8
1.0
Low Delay B
78.2
20.8
1.0
Random Access
73.0
26.4
0.6
Tabl e 8. 19
Reduction of worst case number of bins and memory in HEVC
over H.264/AVC
Metric
H.264/AVC
HEVC
Reduction
Max regular coded bins
7825
882
9
Max bypass bins
13056
13417
1
Max total bins
20882
14301
1:5
Number of contexts
441
154
3
Line buffer for 4k
2k
30720
1024
30
Coefficient storage
8
8
9-bits
4
4
3-bits
12
Initialization Table
1746
16-bits
442
8-bits
8
Note max total bins includes termination mode bins, but does
not include impact of bit limit per CTU or macroblock
8.8.2.1
Reduce Regular Coded Bins
As mentioned earlier, bypass coded bins can be processed faster than regular coded
bins, since they don't have data dependencies due to context selection, and their
interval subdivision can be performed by a simple shift. Table
8.18
shows that the
percentage of regular coded bins under common conditions is lower for HEVC than
H.264/AVC. Table
8.19
also shows that in the worst case conditions, there are 9
fewer regular coded bins in HEVC than H.264/AVC. The reduction in regular coded
bins is primarily due to the improved binarizations of absolute coefficient levels and
components of the motion vector difference.
Using the implementation found in [
103
], where up to 2 regular coded bins or 4
bypass coded bins can be processed per cycle, HEVC gives 2
higher throughput
than H.264/AVC under the worst case (this includes the impact of 1:5
fewer total
bins in HEVC). This can also be translated into power saving using voltage scaling
as mentioned earlier.
