Hardware Reference
In-Depth Information
Error dictionary
Trigger rules of
state transition
States
Outputs
Controller
S
0
10000100...
Input events:
generated by
sensing
system on
the biochip
S
1
S
1
00100001...
S
2
… …
S
4
S
0
S
3
Outputs:
generated by the
current state
State
transition
State of the
controller
Fig. 3.1
The proposed finite-state machine control system implementation of the cyberphysical
system. The FSM runs on the microcontroller or the FPGA, and its current state determines control
signals applied on the biochip. A state transition of the FSM is triggered by the detection of error(s)
the peripheral circuit, the microcontroller, and the universal serial bus (USB) port
of the computer. Each of these components can be a point-of-failure, resulting in
reduced system reliability.
To overcome the above shortcomings, we propose a dictionary-based hardware-
assisted error-recovery method. The key idea in this method is to pre-compute and
store recovery actuation sequences for all errors of interest that may occur during
a bioassay. When an error is detected by on-chip sensors during the execution
of a bioassay, the cyberphysical system can simply look up in the dictionary for
the recovery solution rather than performing on-line re-synthesis using an in-the-
loop computer. This dictionary-based solution therefore reduces response time and
enables flash chemistry.
The proposed dictionary-based error recovery approach can be implemented
using the finite-state machine (FSM) shown in Fig.
3.1
. The control signals for the
biochip is determined by the current state of the FSM; the state transition of the FSM
is triggered by the analog feedback indicating that an error has occurred. The error
dictionary plays the role of a precomputed database that links each possible state to
the corresponding outputs. Entries in the dictionary record all possible errors and
the re-synthesis results, which include the corresponding error-recovery operations.
When an error occurs, the cyberphysical system will utilize the dictionary and load
the pre-computed synthesis results.
Since no software execution is needed for on-line error-recovery, the need for
a computer and the related interfaces can be eliminated. The dynamic adaptation
of the synthesis results can be implemented by a program that executes on the
single-board microcontroller or an FPGA, which integrates components such as
the microprocessor, programmable I/O interfaces, memory, clock circuitry [
15
].
