Digital Signal Processing Reference
In-Depth Information
Fig. 10.6
Unmatched PA TRL measurement (
S
11
and
S
22
)
significantly the impedance at the input and output of the power amplifier (integrated
circuit pads, bondwires, and the bondwire receptacles in the PCB are part of the
DUT).
10.3.4 Fourth Step
The model for the microstrip access lines for the input and output of the power
amplifier is built based on the PCB layout data without the need for fine tuning the
model. This is possible because the substrate used in the PCB is an RF laminate with
tight tolerances (RO4350 [
28
]). It is easier if the input and output access lines are
exactly equal so that just one model is necessary (and just one set of TRL standards
is required).
Figure
10.7
depicts the model as an ensemble of transmission lines. The sec-
tions A-B, B-C, and C-D indicated in this figure correspond to the sections of
equal names in Fig.
10.1
. The parameters used in the model are the characteristic
impedance (
Z
0
), width (
W
), and length (
L
) of the transmission lines; and the rela-
tive permittivity (
ε
r
), thickness (
T
), and dielectric loss (tan
δ
) of the laminate. The
electrical delay of the flange-mount SMA connector used in this example was mea-
suredtobe
t
ed
=
12 mm of
the ideal 50
transmission line used in the model (A-B). This conversion uses the
phase velocity of light in a medium of effective permittivity
ε
e
=
40 ps. This was converted into the electrical length
l
=
1[
26
], according
to the following relationship:
×
√
ε
e
c
l
t
ed
=
.
(10.1)
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