TURBO EQUALIZATION - Adaptive Signal Processing: Next Generation Solutions - page 154

Figure 3.4 Trellis diagram for the encoder of Figure 3.3, which captures state transitions
and outputs. Each path through the trellis corresponds to a code word. Transitions as
solid lines are provoked by an input bit of 0, while transitions as dashed lines are
provoked by an input bit of 1.

bits may be read off as

c 1 ¼ 1 c 2 ¼ 1 c 3 ¼ 0 c 4 ¼ 0 c 5 ¼ 0 c 6 ¼ 1

c 7 ¼ 1 c 8 ¼ 0 c 9 ¼ 0 c 10 ¼ 1 c 11 ¼ 1 c 12 ¼ 1 :

Observe that the final state returns to the same configuration as the initial state (here,
the all-zero state). The final two input bits may always be chosen to force the final
state x K to the all-zero state, if desired. This can be exploited in the decoding algor-
ithm to be reviewed presently.

We consider first the decoder operation using a channel that merely adds back-
ground noise, but is without intersymbol interference for the time being. In this sim-
plified setting, the sequence of output bits is converted to an antipodal form and
immersed in background noise, according to

v j ¼ ( 1) c j

þb j , j ¼ 1, 2, ... ,2 K (3 : 3)

Figure 3.5 Illustrating a particular path through the trellis, using an input block of
length 6.