Hardware Reference
In-Depth Information
output1 <= “0000”;
output1 <= “0000”;
output2 <= “01”;
output2 <= “01”;
nx_state <= B;
nx_state <= B;
when B =>
when B =>
output2 <= “10”;
output1 <= “0000”;
nx_state <= C;
output2 <= “10”;
when C =>
nx_state <= C;
output1 <= “1111”;
when C =>
output2 <= “11”;
output1 <= “1111”;
nx_state <= A;
output2 <= “11”;
end case;
nx_state <= A;
end case;
Note in the code on the left that from state A the machine can only go to state B.
If the desired value for
output1
while in B is the same as that in A, one might be
tempted to omit it in state B. Recall, however, that the upper section of an FSM is
combinational
(thus memoryless), so there is nothing to prevent its output from chang-
ing when the machine leaves a state. For cases like the code above, the compiler will
generally infer latches, guessing that the designer wanted the machine to keep the
same value that it had in the previous state, which can produce an unsafe behavior
because the timing response of latches (built with regular gates) is difi cult to predict
and is subject to race conditions.
In summary, it is important to remember what was said earlier: the list of outputs
must be
exactly the same
in all states (so in this example it must contain
output1
and
output2
in all states, as shown in the code on the right).
The second mistake regards incomplete
transition conditions
specii cations. For
example, consider again that we are using VHDL and the
case
statement to implement
the combinational logic section of an FSM as follows:
--Moore machine:
--Mealy machine:
case pr_state is
case pr_state is
when A =>
when A =>
output <= <value>;
if <condition> then
if <condition> then
output <= <value>;
nx_state <= B;
nx_state <= B;
elsif...
elsif...
...
...
else
else
nx_state <= A;
output <= <value>;
end if;
nx_state <= A;
when B =>
end if;
...
when B =>
end case;
...
end case;
Both codes above are correct. Note that in both the
if
statement includes an
else
part, which takes care of
all
remaining options. If this
else
were omitted, an
