Hardware Reference
In-Depth Information
Figure 3.19
Multimachine implementations with the FSMs associated (a) in series, (b) in parallel, or (c) with
one machine called as part of the other. (d) Example showing a factorial calculator, which needs
a multiplier, so the latter is called as part of the former.
Figure 3.20
(a) FSM with a repetitive pair of states. (b) Solution with FSM decomposition where the secondary
machine operates as a “superstate” to the main machine.
is zero, so it runs from 0 to 2
T
−
1 in this case), after which the machine moves to
state D.
An example where this arrangement can be useful is in serial data communications,
as in the I
2
C interface (chapter 14), because a data vector must be transmitted (state
B) by the master, then an acknowledgment bit must be received from the slave (state
C), with these operations repeated until all data vectors have been sent out.
Another area in which the use of multiple machines is relatively common is in
control units for CPUs, in which simpler instructions (e.g.,
load
and
store
) are part of
