Hardware Reference
In-Depth Information
35
when 9 => y <= "110";
36
end case;
37
38
end process;
39
40 end architecture;
41 ------------------------------------------------
15.3 Serial Data Transmitter
Another example is presented in i gure 15.2a, which is a kind of serial data transmitter.
The output (
y
), which is a single-bit signal, must send out a predei ned single-bit value
in states 0, 2, and 6 (recall that the states' “names” are determined by the pointer),
whereas in states 1 and 3…5 bit-vectors must be serially transmitted (see the data
arrays under those states).
In i gure 15.2a three pointers are shown, called
i
(main pointer, representing the
states),
j
(column index for the arrays of states 1 and 3…5), and
k
(row index for the
array of state 3…5). Note, however, that
k
can be replaced with
i
3, so only two point-
ers are actually needed, resulting in the LUT of i gure 15.2b. This machine too is simple
enough to be implemented using the pointer-based technique.
A corresponding VHDL code is shown below. The data to be transmitted was placed
in an array of constants (called
x
, lines 12-13). The i rst word (i.e.,
x
(0)=“0101”) is
transmitted in state 1, while the whole array is transmitted in state 3…5. As in the
previous example, only one process is used, which builds the pointers (lines 22-38)
and the LUT (lines 41-47). Note that in this example the LSB is transmitted i rst.
−
1 --------------------------------------------------------------------
2 library ieee;
3 use ieee.std_logic_1164.all;
4 --------------------------------------------------------------------
5 entity serial_transmitter is
6
port (
7
run, clk, rst: in std_logic;
8
y: out std_logic);
Figure 15.2
A serial data transmitter and (b) its output LUT.
