Hardware Reference
In-Depth Information
Figure 14.14
Complete FSM for the I
2
C RTC interface.
Two pointers are used in i gure 14.14. The i rst (
i
) is employed in all states where
more than one bit must be transmitted or received. The second (
j
) can be useful when
multiple bytes are involved, which is the case of the dashed rectangles in i gures
14.14b,c; as mentioned above, we have chosen to use
j
only in the transmitter. Recall
that in a category 2 (timed) machine the pointer would run from 0 to 7 (for one byte
of data), whereas here it runs from 1 to 8 because the pointer is immediately incre-
mented when the FSM enters a multibit state (then the
i
= 8 condition in the state
diagram would be
i
= 7 if it were a category 2 machine).
Observe that the values for
SDA
in i gure 14.14 are those that must be produced
by the master. For example, when the slave is supposed to answer with
SDA
= '0' in
the ack states, the master must produce
SDA
= 'Z' (FPGA implementation). Note also
that
SDA
=
x
(8−
i
) was used in the eight-bit writing states, indicating that the MSB will
be transmitted i rst [recall that
i
ranges from 1 to 8, so
x
(7) will go i rst and
x
(0) will
go last]. Here,
x
is just a generic name; the actual signal name varies from one state
to another. Finally, note that the received data must be stored somewhere, as indicated
by an arrow and a box over the dashed rectangle in i gure 14.14c.
