Hardware Reference
In-Depth Information
1 //Module header:---------------------------------------------
2 module control_unit_for_multiplier
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#(parameter N=4) //number of bits
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(
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input logic dv, prod, clk, rst,
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output logic wrR1, sel, wrR2, shft,
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output logic [1:0] ALUop);
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9 //Declarations:----------------------------------------------
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//FSM-related declarations:
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typedef enum logic [2:0]
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{idle, load, waitt, nop, add, shift} state;
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state pr_state, nx_state;
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//Auxiliary-register-related declarations:
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logic [$clog2(N):0] i, i_reg; //function ceiling(log2(N))
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19 //Statements:------------------------------------------------
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// Auxiliary register:
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always_ff @(posedge clk, posedge rst)
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if (rst) i_reg <= 0;
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else i_reg <= i;
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//FSM state register:
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always_ff @(posedge clk, posedge rst)
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if (rst) pr_state <= idle;
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else pr_state <= nx_state;
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//FSM combinational logic:
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always_comb begin
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//Default values:
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wrR1 <= 'b0;
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sel <= 'b0;
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wrR2 <= 'b0;
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shft <= 'b0;
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ALUop <= 2'b00;
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i <= 0;
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case (pr_state)
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idle:
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if (dv) nx_state <= load;
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else nx_state <= idle;
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load: begin
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wrR1 <= 'b1;
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sel <= 'b1;
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wrR2 <= 'b1;
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nx_state <= waitt;
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end
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waitt: begin
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i <= i_reg;
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if (~prod) nx_state <= nop;
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else nx_state <= add;
