Hardware Reference
In-Depth Information
declared either as global parameters (in the module header—see lines 3-5 in the tem-
plate of section 7.3) or as local parameters, as shown in lines 11-13 of the template
below. The variable t (line 14) must obviously stay where it is. As seen in section 8.5.2,
the timer must obey t max
1.
In the statements part of the code (lines 16-55), there are two differences.
The i rst difference is an additional always_ff block (lines 19-22), which imple-
ments the timer, according to the strategy described in section 8.5.2.
The second difference is in the always_comb block that implements the FSM's
combinational logic section (lines 28-50), because t might now appear in the condi-
tions for nx_state (lines 34, 35, 42, . . .). The use of t
max ( T 1 , T 2 , . . .)
T
1 instead of t = T
1 is
required in the conditional-timed transitions with T
t max . Note that t max does not
need to be dei ned in all states, which is not true for strategy #2.
1
<
1 //Timed Moore machine with timer control strategy #1
2 //Part 1: Module header:-----------------------------------
3
(same as for category 1 Moore, section 7.3)
4
5 //Part 2: Declarations:-------------------------------------
6
7
//FSM-related declarations:
8
(same as for category 1 Moore, section 7.3)
9
10
//Timer-related declarations:
11
const logic [7:0] T1 = <value>;
12
const logic [7:0] T2 = <value>;
13
const logic [7:0] tmax = <value>;//tmax≥max(T1,T2,...)-1
14
logic [7:0] t;
15
16 //Part 3: Statements:---------------------------------------
17
18
//Timer (strategy #1, section 8.5.2):
19
always_ff @(posedge clk, posedge rst)
20
if (rst) t <= 0;
21
else if (pr_state != nx_state) t <= 0;
22
else if (t != tmax) t <= t + 1;
23
24
//FSM state register:
25
(same as for category 1 Moore, Section 7.3)
26
27
//FSM combinational logic:
28
always_comb
29
case (pr_state)
30
A: begin
31
outp1 <= <value>;
32
outp2 <= <value>;
33
...
34
if (... and t>=T1-1) nx_state <= B;
35
else if (... and t>=T2-1) nx_state <= ...;
36
else nx_state <= A;
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