Hardware Reference
In-Depth Information
other outward transition in state A, we conclude that the condition
ab
= “10” was not
covered in the state diagram. A similar analysis for state B shows that the transition
condition
ab
= “10” was again not covered. Therefore, in this example, both states are
underspecii ed. If the machine faces one of the unspecii ed combinations, it will either
get stuck there or will proceed as dei ned (probably unconsciously) in the correspond-
ing VHDL or SystemVerilog code.
Figure 1.5b shows a corrected version for the underspecii ed machine of i gure 1.5a.
It was considered that the missing condition for state A (
ab
= “10”) should be associ-
ated to the AA transition, and the missing condition for state B (
ab
= “10”) should be
associated to the BA transition. Note that the latter caused the BA transition to become
independent from
a
.
Another corrected version for the underspecii ed machine of i gure 1.5a is
presented in i gure 1.5c. In this case the missing conditions for states A and B were
associated to the AA and BB transitions, respectively. The representation with implicit
else
was used.
Figure 1.6a shows an example of overspecii cation. Again,
a
and
b
are the transition
control signals. The AB transition is governed by the condition
a
= '1', thus covering
the cases
ab
= “1
” = {“10”, “11”}. The AC transition is governed by the condition
b
= '1', thus covering the cases
ab
= “
−
1” = {“01”, “11”}. Note that
ab
= “11” appears in
both AB and AC transitions, thus causing a conl ict. To solve the problem, we must
establish
priorities
.
−
Figure 1.6
(a) Example of overspecii ed state transition diagram and (b) a possible solution. (c) Another
overspecii ed machine and (d) a possible solution.
