Hardware Reference
In-Depth Information
The output is
siren
, which must be turned on (= '1') when an intrusion occurs or during
the chirps.
A corresponding Moore solution is presented in i gure 8.21b, with
disarmed
,
armed
,
and
alarm
as the fundamental states and
chirp1
to
chirp5
as the chirp-generating states.
Note the timed transitions. The time duration of a chirp is
chirpON
clock cycles, and
the time interval between two siren activations is
chirpOFF
clock periods. Observe,
however, that this machine exhibits the state-bypass problem described in section
4.2.4, which occurs when a long
remt
= '1' command is received because then the
circuit simply circulates in the loop
disarmed
→
chirp1
→
armed
→
chirp3
→
chirp4
→
chirp5
disarmed
, and so on. An additional (minor) problem is that not all transition
conditions are truly complementary (section 1.5); for example, observe in state
armed
that there is no priority dei nition in case
remt
= '1' and
sen
= '1' occur
simultaneously.
A corrected machine is presented in i gure 8.21c, in which two wait states (white
circles) were added to eliminate state bypass. Of course, if a one-shot circuit (section
5.4.3) were added to the previous solution to reduce the duration of
remt
to a single
clock period, and noncomplementarity were corrected, then that machine would work
well too. Note that in the presented solution the alarm can be turned on with
sen
=
'1'; if that is not wanted, all that is needed is to use the condition “
remt
= '1' &
sen
=
'0'” in the
disarmed
-to-
chirp1
transition.
As mentioned in a similar application in section 5.4.5 (garage door controller), a
good practice in this kind of application is to include debouncers for the signals
coming from the remote control and sensors, which not only eliminate the need for
synchronizers but also prevent short glitches (due to lightning, for example) from (de)
activating the alarm (they have to be full debouncers, similar to that in section 8.11.3).
VHDL and SystemVerilog implementations for this car alarm are presented in sec-
tions 9.5 and 10.5, respectively. The analysis of the number of l ip-l ops and the need
for reset and synchronizers is treated in exercise 8.14.
→
8.11.7 Password Detector
This section describes a password detector, used, for example, in password-protected
door locks like that in i gure 8.22a.
The circuit ports are depicted in
i gure 8.22b. The inputs are
key
(which repre-
sents the keypad pushbutton pressed by the user) plus the traditional clock and reset
signals;
key
is composed of four bits, so it can encode a keypad with up to 15 pushbut-
tons (one codeword is reserved for the no-button-pressed case). In the development
below it is assumed that the bits of
key
are already debounced and encoded according
to the table in exercise 5.14. The outputs are
led1
(turned on when the system is in
the
idle
state) and
led2
(turned on for a few seconds when the correct password has
been typed in).
