Hardware Reference
In-Depth Information
Figure 8.18
Solution for the circuit of i gure 8.17b. (a) Time behavior and (b) FSM for the pushbutton
debouncer with embedded one-shot conversion. (c) FSM for the reference-value dei ner, with 10
arbitrary values.
Figure 8.19
Reference-value dei ner with up and down controls implemented (a) with a counter and (b) with
a state machine.
The circuit of i gure 8.19a consists of a block with switch connections plus a
debouncer, followed by a regular counter with up-down control (it counts upward if
up/dn
= '1' or downward otherwise). Note that
x
acts as the clock to the counter, so
x
must be debounced. When a switch is pressed, it must not only generate a pulse in
x
but also dei ne the value of
up/dn
′
(see exercise 8.12).
The circuit of i gure 8.19b also consists of two blocks. Note that it is similar to that
in i gure 8.17b, but with two control inputs. The i rst block contains a debouncer plus
a one-shot conversion circuit, producing two short (one-clock-period duration) pulses
at
x
1
and
x
2
, which are not expected to happen simultaneously. The second block is a
reference-value-dei ner state machine, moving up if
x
1
= '1' or down if
x
2
= '1'. The
construction of this circuit can be based on i gure 8.18. As in that case, it might be
advantageous to build the i rst block with a single FSM that combines the debouncer
and the one-shot circuit. Additionally, because
x
1
and
x
2
are not expected to be active
at the same time, it might be advantageous to build a “combined” debouncer for both
up
and
dn
signals (see exercises 8.9 and 8.10).
′