Hardware Reference
In-Depth Information
Figure 8.14
SSD rotator. (a) Circuit ports. (b) Corresponding (simplii ed) Moore-type state diagram.
The segments must be lit sequentially in the clockwise direction, with overlaps used
to provide a smoother rotation. In other words, segment a must be lit for some time,
then a and b should be lit together, then b only, next b and c , then c only, and so on.
If the stop switch is asserted ( stp = '1'), the movement must stop, resuming exactly
from the same position when stp returns to '0'. If reset is asserted ( rst = '1'), the circuit
must return asynchronously to the initial state (only segment a lit).
A corresponding Moore solution is presented in i gure 8.14b, where each state name
denotes which SSD segments are lit while the machine is in that state. Note that it is
a simplii ed diagram, with only the output value (no output name) shown inside each
state circle and only the time values (no stop conditions) specii ed on the arrows.
Moreover, note the relaxed use of T 1 and T 2 alone on the arrows (instead of t = T 1
1
1), indicating simply the total number of clock periods that the machine
must spend in each state.
As in the previous example, the input ( stp ) is asynchronous and produced by a
mechanical switch. However, because of the nature of the application, again neither
a synchronizer (section 2.3) nor a debouncer (section 8.11.3) is needed.
Based on section 8.10, the number of l ip-l ops needed to implement this circuit is
as follows. For the state register: M FSM = 12 states; therefore, N FSM = 4 if sequential or
Gray encoding is used, 6 for Johnson, or 12 for one-hot. For the optional output reg-
ister: not needed in this application, so N output = 0. For the timer: assuming 120 ms for
T 1 and 35 ms for T 2 , with f clk = 50 MHz, T max = 6
and t = T 2
10 6 clock cycles results, so N timer = 23.
Therefore, N total = 27, 29, or 35.
VHDL and SystemVerilog implementations for this light rotator are presented in
sections 9.4 and 10.4, respectively. Because this machine falls in the situation depicted
in i gure 8.4a, it can be implemented with either timer control strategy (#1, section
8.5.2, or #2, section 8.5.3). Strategy #2 was adopted there, but both strategies are
explored and compared in exercises 9.1 and 10.1.
8.11.3 Switch Debouncer
Figure 8.15a shows a switch that produces x = '0' when open or x = '1' when closed.
The problem with mechanical switches is that they might bounce a few times before
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