Hardware Reference
In-Depth Information
Figure 8.10
(a) A Moore machine and (b) a corresponding timing diagram.
The Moore machine of i gure 8.10a, which includes three transition types, is used
to illustrate the analysis. It is assumed that the timer control strategy #1 is adopted
to build the timer. Observe the following in the accompanying timing diagram of
i gure 8.10b:
1) T B = 3 and T C = 2 clock cycles.
2) When x changes, the output does not change. This is expected because in a Moore
machine the output is synchronous, thus changing only when the state changes.
3) The stay in state A depends only on x , so the machine moves to state B at the i rst
(positive) clock edge that i nds x = '1'.
4) Because T B = 3, state B lasts exactly three clock cycles (the timer counts from
0 to 2).
5) Because T C = 2 but the CA transition is conditional-timed, state C lasts at least two
clock cycles (the timer counts from 0 to 1). The “at least” restriction is due to the x =
'0' condition, which might not be true when the timer reaches the monitored
( T C
1 = 1) value. In this example x = '0' was already available, so state C did last
only two clock periods.
6) In the states where the timer is not needed (only state A in this example), the timer
was kept stopped at zero.
In conclusion, in a Moore machine the output and the state are in perfect sync,
changing at the same time. Each output value then has the same duration as its associ-
ated state.
8.9 Time Behavior of Timed Mealy Machines
The Mealy machine of i gure 8.11a, which is the Mealy counterpart of the Moore
machine of i gure 8.10a, is used to illustrate the analysis. Observe the following in the
accompanying timing diagram of i gure 8.11b:
1) T B = 3 and T C = 2 clock cycles.
2) Contrary to the Moore case, y can change when x changes. This is expected because
Mealy machines are asynchronous.
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