Hardware Reference
In-Depth Information
Figure 8.7
(a) Overspecii ed transition conditions ('0' and T
1 can happen at the same time). (b) Solution
with priority given to transition AB. (c) Solution with priority given to transition AC.
Note, however, that the problem described above can only happen before the i rst
run of the timer, after which the FSM has full control over the timer.
Another timed machine with incorrect transition conditions is shown in i gure 8.7.
However, contrary to the previous example, this machine is over-specii ed, because
more than one transition can be true at the same time ('0' and T
1 can occur at the
same time). As seen in section 1.5, overspecii cation can be resolved by establishing
priorities. AB was considered to have priority over AC in the solution of i gure 8.7b,
whereas the opposite was assumed in i gure 8.7c.
8.7 Repetitively Looped State Machines
This section discusses the particular case of repetitively looped state machines, found,
for example, in serial data communications circuits (serial data receiver/transmitter,
I 2 C interface, SPI interface, etc.). An equivalent implementation will be seen in section
11.5 using the category 3 approach.
The i rst case is shown in i gure 8.8a, where a pair of states is repeated T times (this
kind of problem was in fact introduced in section 3.12). If T is large, it is obviously
impractical to represent this circuit as a regular FSM.
An equivalent representation for this problem is shown in i gure 8.8b, with a loop
replacing the repeated states. This loop must be repeated T times in the AB direction
(in the BA direction the total is T
1 times). Consequently, by converting the category
1 machine of i gure 8.8a into the category 2 machine of i gure 8.8b, the FSM repre-
sentation becomes viable and the problem can be easily solved.
A possible implementation is depicted in i gure 8.8c, with the timer incremented
in both directions (AB and BA), therefore being not zeroed in any of them (note the
thick circles and the different arrows; a thick circle means that there is at least one
transition into that state in which the timer should not be zeroed, while the different
arrow with a dot at its origin identii es which that transition is).
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