Hardware Reference
In-Depth Information
The disadvantages are that it is not generic and that the resulting circuit is not
guaranteed to be smaller than that for strategy #1. Because here the value of
t
max
must
be specii ed in all states (with
t
max
= 0 in the untimed states) when the machine has
conditional-timed transitions, the
t
-to-
t
max
comparator (which also can be large) is
more complex.
Since strategy #2 is not generic, the suggested procedure is to draw the state transi-
tion diagram using strategy #1, checking next if it complies with condition 1 or 2
above in order to determine whether strategy #2 can be used as well.
When using VHDL or SystemVerilog, one of the codes below can be used to imple-
ment the timer for strategy #2. Note the use of
t
t
max
, needed to
guarantee that the timer will be zeroed if the FSM leaves a timed state before the timer
has reached
t
max
(entering therefore an untimed state). However, such a situation can
only occur if the machine has conditional-timed transitions (i gure 8.4b, for example);
if the machine does not have conditional-timed transitions (i gure 8.4a, for example),
then
t
<
t
max
instead of
t
≠
≠
t
max
is i ne, too.
--Timer for strategy #2------------------------
--VHDL------------------------------------------
process (clk, rst)
begin
if rst='1' then
t <= 0;
elsif rising_edge(clk) then
if t < tmax then --see comment
t <= t + 1;
else
t <= 0;
end if;
end if;
end process;
------------------------------------------------
--SystemVerilog---------------------------------
always_ff @(posedge clk, posedge rst)
if (rst) t <= 0;
else if (t < tmax) t <= t + 1; --see comment
else t <= 0;
------------------------------------------------
8.5.4 Time Behavior of Strategies #1 and #2
Figure 8.5 shows an example of FSM that in spite of having a conditional-timed transi-
tion can be implemented using any of the timer control strategies proposed above
(note that this machine falls in the category depicted in i gure 8.4b). The purpose of
this example is to illustrate the differences in terms of time behavior between strate-
gies #1 and #2.