Hardware Reference
In-Depth Information
Figure 1.2
(a) Sequential circuit with a registered feedback loop (a i nite state machine). (b) Counter of i gure
1.1b rearranged according to i gure 1.2a.
i gure 1.2a. Note that the lower section contains only l ip-l ops, whereas the upper
section is purely combinational.
Concept
In short, a state machine is a
modeling
/
design
technique for sequential circuits. At any
time, the machine sits in one of a i nite number of possible states. For each state, both
the output values and the transition conditions into other states are fully dei ned. The
state is stored by the FSM, and the transition conditions are usually reevaluated at
every (positive) clock edge, so the state-change procedure is always synchronous
because the machine can only move to another state when the clock ticks. (Note:
There has been some effort to develop asynchronous FSMs as well.)
Benefi ts
The FSM model provides a
systematic
approach (a
method
) for designing sequential
circuits, which can lead to optimal or near-optimal implementations. Moreover, the
method does not require any prior knowledge or specii cs on how the general circuit
(solution) for the problem at hand should look like.
When to Use the FSM Approach
This will be discussed in section 1.10.
