Hardware Reference
In-Depth Information
a
b
+V
Q
3
Q
4
CCII+
2
Y
B
14
Z
C
15
E
X
1/2 OPA2662
Q
1
Q
2
−V
c
+V
+V
+V
Q
12
Q
11
Q
6
Q
5
Q
9
Q
2
D
1
Q
4
Control
circuit
Y
Q
1
Z
X
D
2
Q
3
Q
13
Q
14
Q
7
Q
10
Q
8
−V
R
B
−V
Fig. 3.23 (a) Realization of CCII+ from OPA2662 (b) Simplified circuit of CCII+ using
OPA2662 (c) Simplified circuit diagram of OPA2662 showing the internal CC-architecture [
21
]
connected between terminals 1 and 4. The other terminal characterization are:
terminal 7 for positive power supply, terminal 4 for negative power supply, terminal
3, 2 and 8 being terminals Y, X and Z of the current conveyor and terminals 5 and
6 being the input and output terminal of the VF. The nominal supply voltages
specified are
5 V. The device offers a wide bandwidth of 850 MHz and exhibits a
slew rate as high as 3,000 V/
ʼ
s.
OPA860 [
23
] which is also functionally and architecturally similar to OPA660
has a bandwidth of 80 MHz and slew rate of 900 V/
s for the OTA (CCII+) part and
has a close loop buffer structure providing 600 MHz bandwidth and 4,000 V/
ʼ
ʼ
s
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