Hardware Reference
In-Depth Information
PNP Wilson current
mirror
PNP cascode current
mirror
+V
I
2
I
B
I
0
Q
1
Q
2
Temperature
compensation
circuit
y
z
x
Q
3
Q
4
−V
NPN cascode current
repetitor
NPN cascode current
mirror
Fig. 3.10 An equivalent representation of the temperature-compensated translinear CC proposed
by Surakampontorn et al. [
10
]
of
2.5 V and the DC bias current I
0
¼
300
ʼ
A, it has been found that in this
modified CC architecture, r
x
is reduced to a value as low as 1.3
ʩ
(in contrast to a
value of about 53
ʩ
for the conventional design).
3.2.9 CCII with Increased Input Impedance at Port-Y
The basic idea for increasing the Y-port input resistance of the CC was proposed by
Alami et al. [
12
] and is shown in Fig.
3.12
. It may be noted that the central core of the
circuit consisting of transistors Q
1
-Q
2
-Q
3
-Q
4
-Q
5
-Q
6
-Q
7
-Q
8
has been modified by
adding two more transistor Q
9
and Q
10
such that the sub-circuit consisting of Q
1
-Q
2
-
Q
3
-Q
4
-Q
9
-Q
10
constitutes two translinear mixed loops in parallel which implies
V
y
V
0
. It may also be noted that employment of the modified Wilson current
mirror consisting of transistors Q
21
-Q
22
-Q
23
-Q
24
connected to positive supply rail
and a cascode mirror based current repeater consisting of Q
15
-Q
16
-Q
17
-Q
18
-Q
19
-Q
20
connected to negative power supply rail has been employed to ensure that the
collector currents of transistors Q
1
,Q
3
,Q
5
and Q
7
are as near as possible to I
0
.
Similarly, to ensure that I
z
is as nearly equal to I
x
as possible and also to enhance the
output impedance looking into terminal Z of modified Wilson current mirrors
consisting of Q
11
-Q
12
-Q
13
-Q
14
and Q
25
-Q
26
-Q
27
-Q
28
.
V
x
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