Hardware Reference
In-Depth Information
Fig. 3.5 An alternate
implementation of CCII+
based upon the proposition
of Barthelemy [ 5 ]
+V
Q 7
Q 8
I B
Q 3
+V
Q 1
I z
I x
x
z
y
Q 2
−V
Q 4
I B
Q 5
Q 6
−V
transistors, in this alternative structure [ 5 ] Y terminal is the common base terminal
of two transistors Q 1 and Q 2 . The rest of the circuitry to duplicate the current
entering the low input impedance node and making a replica of the same made
available as the output current from a high output impedance terminal- Z which is
composed of a pair of current mirrors (Fig. 3.5 ).
A routine analysis of the circuit shows that the differential input V y
V x and the
input current i x are related by the following expression:
V y
V x
i x
2 I 0
Sin h 1
¼
ð
3
:
3
Þ
V T
Subject to the assumption that i x <<
2I 0 , the above equation can be approximated as
i x
V T
2 I 0
V y
V x
r x i x
ð
3
:
4
Þ
From Eq. ( 3.4 ) it is seen that if r x is negligibly small, then V x
V y and from the rest
of the circuit, it can be easily deduced that i z ¼
+i x and therefore, the circuit
implements a CCII+.
3.2.4 Two Simple CCII Implementations
In [ 6 ], Higashimura and Fukui proposed new Type 1 mutator circuit using CCs and
to verify their workability,
they employed simple CCII+ and CCII
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