Hardware Reference
In-Depth Information
In view of the large number of applications of CCCIIs described in Chap. 9 of
this monograph, coupled with the continuous evolution of newer applications in the
recent literature, an optimum design of CCCII for implementation in bipolar,
CMOS and Bi-CMOS technologies, continues to remain an interesting problem
worthy of further considerations.
16.3.3 FG-MOS Current Conveyors
Floating gate MOS (FG-MOS) techniques have quite often been used in the past to
reduce biasing power supply requirements. A number of new and interesting
applications in the area of analog signal processing are currently being investigated.
A well-known attractive feature of the FG-MOS transistor is that it can be fabri-
cated in all prevalent CMOS technologies; however, the so-called double poly
CMOS technology is preferred choice for implementing FG-MOS based circuits.
FG-MOS circuits have been employed in the past in realizing a number of analog
circuit building blocks such as op-amps, OTAs, transconductors etc.
Recently, there have been a number of efforts in realizing FG-MOS based
current mirrors and current conveyors. In [ 20 ] Khateb et al. have presented the
design of low-voltage, ultra-low power, Class AB CC based on folded-cascode
OTA with floating-gate differential pair. It has been shown in [ 21 ] that the archi-
tecture for an FG-MOS CCII could operate from a power supply voltage as low as
0.4 V, has rail-to-rail voltage swing capability and consumes a total quiescent
power of merely 9.5
W[ 21 ]. More recently, Fani and Farshidi [ 22 ] presented a
FG-MOS implementation of the fully differential CCCII (FDCCCII) circuit which
is reproduced here in Fig. 16.4 .
This circuit was implemented in 0.18
μ
μ
m TSMC CMOS technology, operated
from
0.8 V DC power supply and was found to offer a bandwidth more than
1GHz with voltage transfer ratio and current transfer ratio of the order of 0.94 and
0.93 respectively and has been shown to offer significant improvements over earlier
designs. Because of the advantages offered by the FG-MOS CC architectures, there
appears to be enough scope for further refinements in this area.
16.3.4 Design of CCII Employing Bacterial Foraging
Optimization
Recently, Chatterjee et al. [ 23 ] have demonstrated the utility of bacterial foraging
optimization technique in the design of CCs. The technique has been applied on the
design of a CMOS positive second generation current conveyors (CCII+). The
objective set out was to simultaneously minimize the parasitic X port input resis-
tance R x and maximize the high end cut off frequency of the current signal.
Search WWH ::




Custom Search