Second Generation Miscellaneous Linear/Nonlinear Applications of Various Types of Current Conveyors - Current Conveyors: Variants, Applications and Hardware Implementations - page 502

Fig. 15.10 DC voltage
controlled DVCC bistable
multivibrator (Adapted from
[ 13 ] © 2011 Elsevier Ltd.)

I z

z V 0

DVCC

y 2

DPDT
switch

R 2

V B

−

13

y 1

x

V in

R 1 2

4

I x

15.6.3 Single DVCC-Based Monostable Multivibrators

Chien and Lo in [ 14 ] presented two novel single DVCC based monostable
multivibrators which require fewer components than, for example, a traditional
op-amp based multivibrator. These circuits are shown above in Fig. 15.11 .
The operation of these circuits can be explained as follows:
Firstly, it may be noted that the connection from Z to Y 1 along with R 2
constitutes the required positive feedback path which facilitates the saturation of
the DVCC due to which its output could be only in one of the two saturation levels
V 0 and V 0 . The trigger input V trg is a rising edge signal which can be provided by
an external function generator. The permanent stable state of the circuit before the
application of the trigger pulse can be easily shown to be V 0

(Fig. 15.11c ) by noting

that in the stable state (0 T 1 ), the capacitor C is open circuited and V c is

clamped by the diode D or the analog switch M in the circuit of 15.9b. If R 2 is much
greater than R 1 and since I x ¼

< t <

V R 2 , it follows that I x is more
positive than I z which ensures that output voltage V 0 will be in positive saturation
level V 0 .
When a positive edge triggering signal is applied at t

V R 1

V 0 V 0

R 1 ¼

, I z ¼

R 2 ¼

¼ T 1 the circuit enters into a

quasi-stable state (T 1 < T 2 ). When this happens, I z becomes more positive than

I x hence, the output voltage V 0 changes abruptly from V 0 to V 0 . This results in the
discharge of the capacitor through R 1 from t

t <

¼ T 1 . In the quasi-stable state, the

expressions for I x ,I z and V c are given by:

e tT 1 =R 1 C

V 0 V c t ðÞ ¼ 1 ð 15 : 43 Þ

V 0 V 0 V C V C

I X ¼ ¼ ð : Þ

15 44

R 1 R 1

V 0
R 2

V 0
R 2 ¼

I z ¼ ð 15 : 45 Þ

When at a time t T 2 the capacitor voltage drops to the lower threshold voltage

V TL the expression for which is determined when I x ¼

¼

I z and is given by: