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following advantageous features: reduction in total number of active and passive
components used, facilitation of electronic-tunability of the realized impedance
value, lesser influence of the various parasitic impedances or non-ideal parameters
of the active elements employed, use of grounded capacitor(s) or employment of all
grounded passive elements, as desirable from the view point of IC implementation.
It is believed that these advantages might also stimulate the circuit designers and IC
manufacturers to come up with stand-alone ICs of any of the different variants of
the CCs or the generalized current conveyors described in Chap. 10 , which may
eventually bring the described circuits to a more practical footing.
14.2 Simulated Lossless Floating Inductance Using Only
Two CCs and Three Passive Components
In Chap. 5 it was shown that lossless floating inductance and other elements such as
floating FDNR require either two CCs and five passive elements or three passive
elements and three CCs. Thus, using the conventional type of CCs, any circuit
which can realize floating inductor/FDNR using only three passive elements and
only two CCs, was not possible. However, if the CCII can be so modified that it can
have two complimentary Z- output terminals then it has been found [ 7 ] that it does
become possible to realize a lossless FI with only two dual output CCIIs (DOCCII)
and a bare minimum of only three passive components!
One such circuit was presented by Ananda Mohan in [ 7 ] and is shown here in
Fig. 14.1 .
It is straight forward to determine, using the characterizing equations of the
DOCCII, that the floating inductance simulated between ports 1 and 2 is given by
L eq ¼
C o R 1 R 2 . This circuit clearly has the advantage of employing a grounded
capacitor as compared to the two-CC- based and three-CC- based FI simulation
circuits described in Chap. 5 , all of which employ a floating capacitor.
14.3 DVCC-Based Floating Inductance/FDNR
with All Grounded Passive Elements
Sedef and Acar [ 8 ] demonstrated that using two differential voltage current con-
veyors (DVCCs) 1 with dual complimentary outputs (characterized by i y 1 ¼
0,
i y 2 ¼
i x ), it becomes possible to realize floating
impedance using only two DVCCs 2 along with all the three impedances being
0, v y ¼
v y 1
v y 2 , i z 1 ¼
+ i x and i z 2 ¼
1 The differential voltage Current Conveyor was first introduced by K. Pal in [ 43 ].
2 For a class of floating inductors realizable with DVCCs along with other types of CCs, using only
three passive elements, see [ 35 ].
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