Hardware Reference
In-Depth Information
Fig. 2.4 Implementation of
CCII+ and CCII
proposed
by Senani [
3
]
I
B
i
y
+
g
m
Y
R
01
Z
+
i
z
−
X
−
i
x
Fig. 2.5 Implementation of
CCI+ and CCI
R
02
I
B
proposed
i
y
+
by Senani [
3
]
g
m
Y
R
01
Z
+
i
z
−
X
−
i
x
It should be recalled that the CCII implementation by Black, Friedmann and
Sedra requires an integrated circuit
A749 containing an op-amp with uncommitted
output collectors, which when augmented by the introduction of several PNP and
NPN transistors externally realizes a CCII. On the other hand the Bakhtiar-
Aronhime circuit requires 5 op-amps along with 13 external resistors. In compar-
ison with these approaches, the op-amp-OTA based implementation is simpler and
more versatile because it can realize CCII as well CCI (positive and negative both).
ʼ
2.2.4 Huertas
s Entirely Op-Amp Based CC Implementation
'
Huertas [
4
] presented an entirely op-amp version of Senani
s op-amp-OTA based
circuit [
3
] which is shown here in Fig.
2.6
. This circuit can be implemented from a
single dual op-amp IC chip. The circuit as shown realizes a CCII; for realizing a
CCI an additional resistor needs to be connected between the non-inverting input
and the output of the first op-amp. The circuit in the dotted box acts as a differential
voltage controlled current source (DVCCS) which is what an OTA does. An
analysis of the circuit shows that it is not really necessary to take r
1
¼
'
r
2
and
r
3
¼
r
4
as originally taken by Huertas. The same results can be obtained by selecting
component values to satisfy the following condition.
r
1
r
3
¼
r
2
r
4
¼
r
r
0
ð
2
:
1
Þ
As compared to the op-amp-OTA-based circuit of [
3
] this circuit was claimed to
provide the following advantages: (i) with appropriate choice of the op-amps this
circuit can provide a better frequency response (ii) the differential input impedance
of an OTA which is typically of the order of 20 K
, imposes an upper bound on the
value of resistor r; using only op-amps relaxes this limitation (iii) it is possible to
achieve offset correction in this circuit by appropriate choice of resistors r
1
,r
2
,r
3
,r
4
ʩ
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