Hardware Reference
In-Depth Information
a
V
1
V
4
TO-ICCII
z
1+
R
1
DO-ICCII
x
y
V
in
y
z
1+
C
2
z
2+
z−
V
6
V
3
V
5
V
2
z−
x
2
1
R
4
R
2
R
3
C
1
b
10
0
−20
−40
ideal
simulated
−50
100KHz
300KHz
1.0MHz
3.0MHz
10MHz
30MHz
Frequency
Fig. 12.28 ICCII-based VM biquadratic filter proposed by Minaei et al. (Adapted from [
89
]
©
2006 Birkhauser Boston) (a) Circuit configuration (b) SPICE generated frequency responses of
various filters
s
2
Ds
s
2
Ds
V
5
V
in
¼
R
3
R
1
V
5
V
in
¼
R
4
R
1
HPF
;
ð
12
:
115
Þ
:
ðÞ
;
ðÞ
where
þ
1
C
2
R
2
1
C
1
C
2
R
1
R
2
s
2
D
ðÞ¼
þ
s
ð
12
:
116
Þ
The filter parameters
ˉ
0
and Q
0
are given by:
r
1
C
1
C
2
R
1
R
2
r
C
2
R
2
C
1
R
1
ω
0
¼
and Q
0
¼
ð
12
:
117
Þ
Thus
ˉ
0
and Q
0
can be controlled orthogonally by varying R
1
,R
2
or C
1
,C
2
simultaneously.
The circuit was simulated in SPICE using 0.35
μ
m TSMC CMOS technology
process parameters using the CMOS ICCII of Fig. 2 of [
89
], biased with
5VDc
power supplies with passive components values chosen to realize various filters for
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