Analog Filter Design Revisited: Circuit Configurations Using Newer Varieties of CCs - Current Conveyors: Variants, Applications and Hardware Implementations - page 363

a

y 1

+

V id DVCC z

V out

y 2

−

x

R 2

R 1

b

1.0

V out

G=4
=3
=2
=1

0.5

0

−1.5

−1.0

−0.2 −0.1 0 0.1 0.2

V id [V]

Fig. 12.1 Instrumentation amplifier presented by Hassan and Mahmoud (a) Circuit configuration
(b) Transfer characteristics (Adapted from [ 1 ] 2008 Elsevier GmbH)

©

with CMOS DVCC implementable in 0.25 m CMOS technology with TMSC

process parameters with DVCC biased from a DC power dual power supply of

μ

1.5 V. Figure 12.1b shows the transfer characteristics of this instrumentation
amplifier when gain is varied from 1 to 4. SPICE simulations show that the 3-dB
bandwidth of this circuit, even when the gain is varied, remains essentially constant
around 8 MHz.
We now present some selected DVCC-based filter configurations employing one
to four DVCCs and realizing filters in VM or CM exhibiting different characteristic
features.

Single-DVCC Yuce biquads Figure 12.2 shows two VM multifunction filter
configurations which simultaneously realize second-order LPF, HPF and BPF
from the same circuit topology employing single dual output DVCC.
A straightforward circuit analysis of Fig. 12.2a and b yields the following
voltage transfer functions:

þ sC 2 R 2 ð R 1 Þ sC 1 R 1

Ds

s 2 C 1 C 2 R 1 R 3
Ds

1

H LP ¼ H BP ¼ H HP ¼ ð 12 : 3 Þ

;

ðÞ ; Ds ðÞ ðÞ