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a
V
DD
V
Bias
I
X
1:B
M
1
M
4
I
D2
M
3
y
I
D3
z
M
2
V
GS2
I
X
x
b
V
DD
V
Bias
M
4
M
1
M
sh1
1:B
I
D2
M
3
z
I
D3
M
sh2
M
2
y
I
D2
x
Fig. 10.16
Simple implementations of the extended current conveyors [
55
]
2
3
2
3
2
3
2
3
V
x
I
y
I
z
010
000
ʲ
I
x
V
y
V
z
V
GS
2
0
ʲ
4
5
¼
4
5
4
5
þ
4
5
ð
10
:
19
Þ
00
I
D
2
while the second architecture of Fig.
10.16b
uses no more than six MOSFETs (still
a smaller number as compared to those required for implementing a normal CC)
and has a characterization:
2
4
3
5
¼
2
4
3
5
2
4
3
5
þ
2
4
3
5
V
x
I
y
I
z
010
000
ʲ
I
x
V
y
V
z
0
þ
I
D
2
ð
10
:
20
Þ
00
I
D
2
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