Varieties of Current Conveyors - Current Conveyors: Variants, Applications and Hardware Implementations - page 319

10.2.10 Differential-Current Voltage Conveyor

In 1999, Salama and Soliman [ 32 ] introduced a new variant of CC which they chose
to call a Differential current voltage conveyor (DCVC) characterized by the
following equations: V x1 ¼

V z . They also pro-
posed a CMOS implementation of this block and showed that this is particularly
useful for realizing electronically-controllable MOS-C quadrature oscillator suit-
able for designing digitally-controlled oscillators.
It is interesting to point out that in the same year 1999, Acar and Ozoguz [ 33 ]
introduced a new versatile building block suitable for analog signal processing
which the called Current differencing buffered amplifier (CDBA) which is charac-
terized by exactly the same equations as specified above for the DCVC. Thus, it is
clear that DCVC and CDBA are one and the same thing-a fact which does not
appear to be so well recognized in the technical literature. The symbolic notation of
the DCVC consists of a differential current conveyor (DCC) followed by a voltage
buffer as shown in Fig. 10.12a . An exemplary CMOS realization of the DCVC is
shown in Fig. 10.12b .
For CMOS implementation and some exemplary application circuits of DCVC,
the readers are referred to [ 32 , 34 , 35 ] and the references cited therein. Also, yet
another variant of DCVC called Current-controlled DCVC has been dealt with
in [ 36 ].

0, V x2 ¼ 0, I z ¼ I x1 I x2 and V o ¼

10.2.11 Fully-Differential CCII

El-Adawy et al. in the year 2000 presented [ 37 ] another novel modification of the
current conveyor termed Fully differential second generation current conveyor
(FDCCII) which is eight terminal analog building block described by the matrix
equation:

2 3

I Xþ
I X
V Y 1
V Y 2
V Y 3
V Y 4

2
4

3
5 ¼

2
4

3
5

4 5

V Xþ
V X
I Zþ
I Z

001 1 1

0
0
0

0
1
0
0

00 11

100 0
010 0

ð 10 : 9 Þ

The symbolic notation of the FDCCII has been shown in Fig. 10.13a . The FDCCII
has been since then used by a number of researchers, for instance, see [ 37 - 43 ]in
various applications and a number of CMOS implementations have also been
evolved. An equivalent of the exemplary circuit proposed by Kacar et al. [ 38 ] has