Hardware Reference
In-Depth Information
a
X
+
−
I
B1
r
4
r
3
r
2
r
1
−
Z
+
Y
−
G
1
+
b
I
B1
-
X
r
1
Z
+
r
2
G
1
−
−
+
+
G
2
I
B2
Y
Fig. 10.2
Two possible circuit implementations of the GCC proposed by Senani in [
4
](
a
)
h
12
¼
r
1
r
3
/r
2
r
4,
h
21
¼1, h
32
¼
Gr
1
(
b
)h
12
¼
G
2
r
2,
h
21
¼1, h
32
¼
G
1
r
1
Fig. 10.3
Scheme of using
the GCC as an immittance-
floatator [
4
]
Y
i
2
Z
GCC
i
1
+
X
V
+
−
2
V
2
−
1
2
N
1
1
Search WWH ::
Custom Search