Hardware Reference
In-Depth Information
where
s
C 1 R x 2 þ
1
C 1 C 2 R x 2 R x 3
s 2
Ds
ðÞ ¼
þ
ð
9
:
42
Þ
SPICE simulations based upon a CMOS DO-CCCII (a multiple output version of
the circuit of Fig. 9.4 ) using TSMC 0.35
m CMOS process have shown that f 0 in
the order of 1.27 MHz is conveniently realizable. It has also been demonstrated that
compared to other realizations, this circuit simultaneously offers the advantageous
features of employment of both grounded capacitors, high output impedance good
for cascadability, no need to employ inversion of input current or requirement of
double of the input signals to realize all five generic filters and no component-
matching constraints.
Another three CCCIIs based circuit which also employs both grounded capac-
itors without requiring any passive component matching and still realizing all the
five generic filter function is the SIMO-type universal biquad of Maheshwari and
Khan [ 28 ] which is shown in Fig. 9.31 .
Note that this circuit has a resistive (although variable due to the DC bias current
I 03 being variable) input impedance and provides all the five outputs from high
output impedance nodes.
The five transfer functions realized by the circuit are given by:
μ
s 2
I LP
I in ¼
1
=
R x 1 R x 2 C 1 C 2
Ds
, I BP
s
=
R x 1 C 2
Ds
, I BR
ð
þ
1
=
R x 1 R x 2 C 1 C 2
Þ
I in ¼
I in ¼
;
ðÞ
ðÞ
Ds
ðÞ
s 2
Ds
s 2
I HP
I in ¼
, I AP
ð
s
=
R x 1 C 2 þ
1
=
R x 1 R x 2 C 1 C 2
Þ
I in ¼
;
ð
9
:
43
Þ
ðÞ
Ds
ðÞ
Where
s
R x 1 C 2 þ
1
R x 1 R x 2 C 1 C 2
s 2
Ds
ðÞ ¼
þ
ð
9
:
44
Þ
I b3
X
I b2
I b1
I BP
Z+
Z+
Z+
Y
X
3
2
1
C 1
C 2
I LP
Z++
I in
Z+
Y
Z+
X
Y
Z+
I BR
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