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a
I
01
X
DO-CCCII
I
1
I
1
1
Z+
Z−
2
V
1
V
2
Y
Y
Z
Z
Y
C
CCCII+
CCCII+
X
X
I
03
I
02
b
I
01
X
DO-CCCII
I
1
I
1
1
2
Z+
Z−
V
2
V
1
Y
Y
Z
Z
Y
C
CCCII+
CCCII+
X
X
I
03
I
02
Fig. 9.18 Floating inductance simulators [
16
](a) Positive floating inductor (b) Negative floating
inductor
On the other hand, the Y-matrix for the circuit of Fig.
9.18b
is of the same form
as the above but with a negative sign thereby representing a negative floating
inductance of value L
eq
¼
CR
x1
(R
x2 +
R
x3
).
Yet another circuit requiring only thee active elements to simulate a lossless
floating inductance was presented by Khan and Zaidi [
17
] which employs two
CCCIIs and one voltage buffer as shown in Fig
9.19
.
By straight forward analysis, the Y- matrix of this circuit is found to be:
1
sCR
x
1
R
x
2
V
T
2
I
0
i
,i
1
1
½
¼
Y
where
R
xi
¼
¼
1, 2
ð
9
:
18
Þ
;
11
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