Second Generation Controlled Current Conveyors (CCCII) and Their Applications - Current Conveyors: Variants, Applications and Hardware Implementations - page 249

current-controlled grounded and floating resistors, summers, subtractors, instru-
mentation amplifiers, universal CM/VM/mixed-mode biquad filters, sinusoidal
signal generators, precision rectifiers, frequency doubler, multipliers/dividers,
squarers and square rooters etc. Significant developments taken place on the design
of CCCIIs in bipolar/CMOS/BiCMOS technologies have also been elaborated.

9.2 Bipolar/CMOS/BiCMOS CCCIIs

In this section, we take a look into the various bipolar/CMOS and BiCMOS
architectures of the CCCIIs evolved in literature. In order to simplify the circuit
diagram representations which employ a number of bipolar/MOS current mirrors
(CM) and current repeaters (CR), we would be using the symbolic notations of the
CMs and CRs as given in Fig. 9.1 .
CCCII is the second generation CC in which the finite non-zero input resistance
at port-X (R x ) is taken into consideration. The basic translinear CCCII circuit
proposed by Fabre et al. [ 1 , 2 ] employs a mixed-translinear-cell (MTC) comprising
of transistors Q 1 -Q 2 -Q 3 -Q 4 and is shown in Fig. 9.2 .
A straight forward analysis of the circuit of Fig. 9.2 shows that it is characterized
by:

i y ¼ 0 ð 9 : 1 Þ

ν y ν x
V T ¼

i x
2 I B

i x
2 I B , for i x <<

Sin h 1

2 I B ð 9 : 2 Þ

V T
2 I B and i z ¼

or ν x ν y þ i x R x where R x ¼ i x ð 9 : 3 Þ

From equation ( 9.3 ), it follows that R x is electronically-tunable through the exter-
nal DC bias current I B . With

2.5 V, this circuit exhibits a voltage gain of
0.9984, a current gain of 1.022 with a 3-dB bandwidth of about 615 MHz [ 2 ]. The
symbolic notation and simplified equivalent circuit of a CCCII are shown in
Fig. 9.3 .
In the following sections, we demonstrate how a CCCII+ or CCCII

V ¼

or a
combination of both can be used to realize a number of useful electronically-
controllable linear as well as non-linear circuits. It may be mentioned that from
the circuit of Fig. 9.2 , a CCCII can be obtained by breaking the link at the junction

of Z-terminal and adding one more pair of current mirrors in a cross-coupled
manner.
A CCCII can also be realized by CMOS architecture analogous to that of Fig. 9.2
as shown Fig. 9.4 which was introduced by Chaisricharoen et al. [ 3 ].
The basic translinear cell consisting of M n1 ,M n2 ,M p5 ,M p6 in the above CMOS
implementation is analogous to the bipolar MTC. This cell is redrawn as a core of