Hardware Reference
In-Depth Information
The above expression can be written in the following simplified form:
1
þ
x
1
R 1
1
R 3
V o ¼
x V in where x
¼
R 2
ð
8
:
33
Þ
1
An analysis of the second circuit of Fig. 8.22b demonstrates that this circuit also
realizes the same function as in Eq. ( 8.32 ). It may be mentioned that in both the
circuits, the conditions required to realize pseudo-exponential function are given by
x
<
0, if R 1 >
>
0ifR 1 <
R 3 or alternatively, x
R 3 .
8.8 Built-in-Test Structures Using CCs
The use of CM techniques for mixed signal testing has acquired importance due to
the complexity of modern integrated circuits and high fabrication densities. It has
been recognized that in the detection of certain classes of faults, current sensing
techniques are more effective than the techniques based upon voltage measure-
ments. The monitoring of quiescent current may provide a clear indication of the
faults and design errors in the circuits which can be carried out on- or off-chip. The
built-in-testing (BIT) structures are well-known in the domain of digital circuit
design. However, in the domain of analog or mixed mode circuit, BITs are not yet
established. Hatzopoulos et al. in [ 10 ] presented a simple linear built-in-sensor
based on CCII+ as the signal processing element. The basic scheme of the built in
current sensor (BICS) is shown in Fig. 8.23 .
In the proposed scheme, CUT represents the circuit under test. The quiescent
current I PS close into the detecting transistor Q 1 which is mirrored and scaled by a
constant k (k
1) to transistor Q 2 . The current flowing into Q 2 is compared with a
reference current I ref . It may be noted that the CCII+ ensures that the collector-
emitter voltages of the transistor Q 1 and Q 2 are forced to be equal and the collector-
base voltages are equal to zero. During normal operation, CCII+ provides an output
current at node-Z equal to the input current at node-X. In the proposed scheme, if
I ref is set equal to the quiescent current, the CCII+ detects only the deviations in I ps
and provides an output current and hence, an output voltage proportional to the
deviation in the quiescent current i.e., V out ¼ ʔ
I ps R L .
Hatzopoulos et al. have also demonstrated in [ 10 ] how built-in- test-structures
can be implemented for voltage input data as well as current input data using a
number of voltage controlled current conveyors in which the current gain between
the ports X and Z of the CCII+ s can be made either zero or one depending upon
whether an external control voltage is kept high or low. The interested readers are
referred to [ 10 ] for further details.
Search WWH ::




Custom Search