Hardware Reference
In-Depth Information
V
R1
Y
V
R2
Z
CCII+
M
2
D
1
V
dd
X
D
3
I
1
V
dd
X
M
1
V
0
CCII+
Z
D
2
I
R
Y
V
in
Y
M
3
V
dd
CCII+
Z
X
V
ss
Fig. 8.17 CCII based fuzzy membership function proposed by Liu et al. [
2
]
a
b
D
1
D
1
V
1
V
1
Y
Y
Z
V
0
V
0
Z
CCII+
CCII+
X
X
M
1
M
2
M
1
M
2
V
dd
V
dd
V
2
V
1
V
2
Fig. 8.18 Two-input Max and Min circuits proposed by Liu, Hwang and Tsay (a) Max (b) Min [
2
]
8
<
g
m
1
V
R
1
ð
V
in
Þ
if V
in
<
V
R
1
I
1
¼
0
if V
R
1
V
in
V
R
2
ð
:
Þ
8
26
:
g
m
1
V
in
ð
V
R
2
Þ
if V
in
>
V
R
2
for equal transconductance of M
1
and M
2
.
If the conductance of the MOSFET M
3
is taken as g
m3
the output voltage of the
circuit can be expressed as:
8
<
f
g
m
1
ð
V
R
1
V
in
Þ=
g
m
3
if V
R
1
I
R
=
g
m
1
V
in
<
V
R
1
V
0
¼
I
R
=
g
m
3
if V
R
1
V
in
V
R
2
ð
8
:
27
Þ
:
g
m
1
V
in
ð
V
R
2
Þ=
g
m
3
if V
R
2
<
V
in
V
R
2
þ
I
R
=
g
m
1
The circuit thus, realizes a fuzzy membership function consisting of three
piecewise-linear sections. The circuits which can function as two-input Max or
Min circuits are shown in Fig.
8.18
.
In these circuits, the MOS transistors are acting as resistors. The transfer
characteristic of the circuit of Fig.
8.18
a can be expressed as:
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