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a
V 1
Y
Y
CCII+
X
I 0
Z
CCII−
Z
X
V G
V G + V 2
b
V 1
I 0
V 2
Fig. 8.9 (a) A transconductance multiplier circuit and (b) its symbolic notation proposed by Liu
et al. [ 1 ]
V 0
V 1
Y
CCII+
X
Z
V 2
R
Fig. 8.10 Analog divider [ 1 ]
Using this multiplier circuit, another analog divider similar to that of Fig. 8.10 can
be obtained which is shown in Fig. 8.12 .
By straight forward analysis assuming the aspect ratios of all the MOSFETs to
be identical, the output voltage of this circuit is given by:
ð
V GA
V GB
Þ
ð
V in 1
V in 2
Þ
V 0 ¼
ð
8
:
19
Þ
V 2
A circuit to carry out the function of a square rooter is shown in Fig. 8.13 .
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