Hardware Reference
In-Depth Information
V
in
Y
D
1
CCII+
Z
A
X
D
2
V
0
V
in
V
0
R
1
0
t
0
R
2
t
D
4
X
CCII+
Z
B
Y
D
3
Fig. 8.5 Proposed precision full-wave rectifier scheme using CCII+ proposed by Khan et al. [
7
]
z-output current makes D
4
ON and D
3
OFF. Thus, for V
in
>
0, it follows that V
o
too
will be positive and would be given by:
R
2
R
1
þ
V
0
¼
V
in
ð
8
:
2
Þ
ð
2
R
x
Þ
In the next half cycle, when V
in
becomes negative, the roles of the diode pairs
D
1
-D
2
and D
3
-D
4
are interchanged but the current in the load resistor still flows in
the positive direction only whose value is still given by the above equation. Thus, a
full wave rectification is attained.
It is easy to visualize that by reversing the terminals of all the four diodes, an
inverting full wave rectifier can be realized. This circuit with CCII+ realized using
AD844 is found to work well till a frequency of the sinusoidal input of 1 MHz,
exhibits very good linearity in its transfer characteristics. However, V
in
and R
1
need
to be selected such that the maximum X-terminal current does not exceed 6 mA [
7
].
Wilson and Mannama demonstrated in [
6
], that the basic bridge-type full wave
rectifier topology of Fig.
8.2
can be modified as shown in Fig.
8.6
which results in
enhanced performance. The bias voltage V
B
is created on the junction of the diodes
D
1
and D
3
through a current source I
B
, a separate bias bridge of similar diodes D
5
-
D
8
and a voltage follower. The current I can be created in the simplest case by a
resistor returned to positive DC power supply. The output section of the modified
circuit consists of the current summation node and a transimpedance amplifier. It
may be noted that in the circuits of Figs.
8.1
and
8.2
, deriving the load directly from
the bridge results in full output voltage being reflected back through the bridge
detracting from accurate operation through voltage modulation of the CCII+ output
terminals. Moreover, due to the biasing current flowing into the load there would be
an unwanted offset voltage. By contrast, in the modified circuit of Fig.
8.6
, due to
the formation of the current summing node and a virtual ground at the junction of
the diodes D
2
and D
4
, the effect of the reflected voltage modulation is eliminated
thereby providing a much greater linear range while still providing a voltage output
for interfacing through subsequent stages through the transimpedance amplifier
output stage.
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