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a
CCII+
y
I in
z
x
V in
I d2
I d1
V G2
M 2
V G1
M 1
R eq
b
V G1
M 1
I 1
I 2
V G2
V 1
V 2
x
x
z
z
M 2
y
y
Fig. 5.49 Linear voltage controlled resistance realization using current conveyors based upon the
NIC-based propositions of Tabei et al. [ 72 ]; also discussed by Soliman [ 79 ](a) grounded VCR (b)
floating VCR
V G1
I in2
V in2
V G2
V G2
I in1
V in1
V G2
x
x
V G1
CCII+
z
CCII+
z
y
y
V G1
Fig. 5.50 Voltage controlled gyrator realization (a) the prototype gyrator (b) the MOS version
using CCIIs, based upon the proposition of Tabei et al. [ 72 ]
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