Basic Analog Circuit Building Blocks Using CCs and Application of CCs in Impedance Synthesis - Current Conveyors: Variants, Applications and Hardware Implementations - page 124

such functions. In this section, we present some representative circuits dealing with
electronically-controllable impedances using CCs.
In the circuit of Fig. 5.49a , the basic idea of which was proposed by Tabei
et al. [ 72 ], a CCII-based NIC is employed as shown by Soliman in [ 79 ], to cancel
out the square non-linearities of the MOSFETs M 1 with that of M 2 thereby leading
to the realization of equivalent input impedance given by:

R in ¼ 1 = ½ 2 KV G 1 ð V G 2 Þ ð 5 : 59 Þ

¼ ʼ 2 C ox L and symbols have their usual meaning.
The circuit of Fig. 5.49b realizes a voltage-controlled resistor of same value in
floating form. It must be mentioned that in the grounded and floating VCRs of
Fig. 5.49 , a negative grounded VCR and a negative floating VCR can be obtained
simply by selecting V G2 >

where K

V G1 .
An extension of the above idea, when applied to a known two-NIC-based gyrator
leads to a MOSFET-based gyrator shown in Fig. 5.50 . When this gyrator is
terminated into a capacitance C L the input impedance represents pure voltage-
controlled inductance controllable by the voltage (V G1 V G2 ).
By a routine analysis, the input impedance of the circuit, with output port
terminated into a capacitance C L , is given by

sC L
4 K 2 V G 1

Z in ¼ ð 5 : 60 Þ

2

ð V G 2 Þ

and the circuit, thus, realizes a voltage controlled inductance value.
An extension of the ideas incorporated in the circuits of Fig. 5.49 to realize a
linear transconductor was presented by Soliman in [ 79 ]. His proposition is shown in
Fig. 5.51 . By a straight forward analysis (assuming the triode region operation of
both the MOSFETs), the output current (I o ) can be obtained as:

I 0 ¼ 2 KV G 1 ½ V G 2 V in ð 5 : 61 Þ

A CC-based circuit for realizing a voltage/current controlled grounded resistor with
wide dynamic range extension was given by Maundy et al. in [ 130 ]. This circuit
incorporates the use of bisection of the drain to source voltage of a JFET to produce
the linear resistor where CCII+ along with three resistors has been employed to
extend the linearity of the variable resistor whose value can be controlled by a
variety of methods finally culminating into the circuit shown in Fig. 5.52 .
With R a ¼R b ¼R 1 /2, R 1 ¼

1 a R 2

a aV in

V TH to
ensure that the MOSFET is operating in triode region, the input resistance of the
circuit is found to be:

and assuming that V c >

2 þ