Biomedical Engineering Reference
In-Depth Information
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Figure 4.36
The functional test on the cross-referencing-based chip.
4.5.4.2 Cross-Referencing-Based Chip
The proposed functional test method can also be applied to cross-refer-
encing-based chips. The test procedure is the same as the one described in
Subsection 4.5.3. As shown in Figure 4.36, to execute the splitting test for all
the even electrodes in the second row, test droplets are first routed to all the
odd electrodes. Next, the second row pin and all the odd column pins are
activated. This also completes the mixing test for all the odd electrodes. In
the final step, the row pin and all the even column pins are activated, thereby
completing the splitting test for all the odd electrodes and mixing test for the
even electrodes.
4.5.4.3 Array-Partitioning-Based Chip
In Section 3.1, a biochip array is divided into several partitions based on
the droplet-routing results. In each partition, the Connect-5 pin-assignment
algorithm is used to control the electrodes in it using five pins, as shown
in Figure 4.37. Such a pin-assignment algorithm allows free movement of
a single droplet in the partition. However, only one droplet movement is
allowed. Concurrent manipulation of more than two droplets within a single
partition will lead to unintentional operations. Therefore, no operations that
involve two or more droplets, for example, mixing and splitting, can be carried
out within a single partition. In fact, these operations can only be executed
using the electrodes on the boundary of two partitions. Therefore, only the
electrodes on the boundary need to be tested for such malfunctions.
Note that since only one droplet is allowed in each partition, while a mix-
ing or splitting test is carried out on one electrode, for example, E 1 , on the
boundary of two partitions (Partition 2 and Partition 4) in Figure 4.37, no
other electrodes in the same partition, for example, E 3 , can be tested at the
same time. As a result, boundary electrodes can only be tested one by one,
and the concurrency of the functional test is compromised. Fortunately, the
total length of the boundaries on a chip is bounded by 2 × N for an N × N
array. Only a limited number of iterations of the functional test are needed.
Moreover, it can been seen from Figure 4.37 that the functional test of elec-
trodes on different boundaries of different partitions, for example, E 1 on the
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